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dt-bindings: riscv: Add xsfvfnrclipxfqf ISA extension description
authorCyan Yang <cyan.yang@sifive.com>
Fri, 18 Apr 2025 05:32:32 +0000 (13:32 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 8 May 2025 18:01:43 +0000 (11:01 -0700)
commita5a15e07cbb900b59fbdb927189d24d1d01ad2e7
treee4bfd4e19b9a606d277b7d1df21e01de33c0e488tree
parent1a6274f035346e76835d46096136dd3e6cca9575commit | diff
dt-bindings: riscv: Add xsfvfnrclipxfqf ISA extension description

Add "xsfvfnrclipxfqf" ISA extension which is provided by SiFive for
FP32-to-int8 ranged clip instructions support.

Signed-off-by: Cyan Yang <cyan.yang@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250418053239.4351-6-cyan.yang@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/extensions.yaml diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)