x86/cpufeatures,opcode,msr: Add the WRMSRNS instruction support
authorXin Li <xin3.li@intel.com>
Tue, 5 Dec 2023 10:49:50 +0000 (02:49 -0800)
committerThomas Gleixner <tglx@linutronix.de>
Thu, 25 Jan 2024 18:10:29 +0000 (19:10 +0100)
commita4cb5ece145828cae35503857debf3d49c9d1c5f
treec6fdc9b00cc4efc65f4ff43574809df8e7fa3d0f
parent6613476e225e090cc9aad49be7fa504e290dd33d
x86/cpufeatures,opcode,msr: Add the WRMSRNS instruction support

WRMSRNS is an instruction that behaves exactly like WRMSR, with
the only difference being that it is not a serializing instruction
by default. Under certain conditions, WRMSRNS may replace WRMSR to
improve performance.

Add its CPU feature bit, opcode to the x86 opcode map, and an
always inline API __wrmsrns() to embed WRMSRNS into the code.

Signed-off-by: Xin Li <xin3.li@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Shan Kang <shan.kang@intel.com>
Acked-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
Acked-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20231205105030.8698-2-xin3.li@intel.com
arch/x86/include/asm/cpufeatures.h
arch/x86/include/asm/msr.h
arch/x86/lib/x86-opcode-map.txt
tools/arch/x86/include/asm/cpufeatures.h
tools/arch/x86/lib/x86-opcode-map.txt