perf: arm_pmuv3: Prepare for more than 32 counters
authorRob Herring (Arm) <robh@kernel.org>
Wed, 31 Jul 2024 16:51:19 +0000 (10:51 -0600)
committerWill Deacon <will@kernel.org>
Fri, 16 Aug 2024 12:09:12 +0000 (13:09 +0100)
commita4a6e2078d85a9d94bcc7eab77845cb8cd39f680
tree884ba4a594cf575a0ca30b99be2f8a94d60ad884
parentbf5ffc8c80e0cf5205849cd0c9c3cb261d2beee6
perf: arm_pmuv3: Prepare for more than 32 counters

Various PMUv3 registers which are a mask of counters are 64-bit
registers, but the accessor functions take a u32. This has been fine as
the upper 32-bits have been RES0 as there has been a maximum of 32
counters prior to Armv9.4/8.9. With Armv9.4/8.9, a 33rd counter is
added. Update the accessor functions to use a u64 instead.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Tested-by: James Clark <james.clark@linaro.org>
Link: https://lore.kernel.org/r/20240731-arm-pmu-3-9-icntr-v3-2-280a8d7ff465@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
arch/arm64/include/asm/arm_pmuv3.h
arch/arm64/include/asm/kvm_host.h
arch/arm64/kvm/pmu.c
drivers/perf/arm_pmuv3.c
include/kvm/arm_pmu.h