drm/i915: add gtt misalignment test
authorRobert Beckett <bob.beckett@collabora.com>
Fri, 18 Feb 2022 18:47:45 +0000 (00:17 +0530)
committerLucas De Marchi <lucas.demarchi@intel.com>
Sun, 20 Feb 2022 04:36:57 +0000 (20:36 -0800)
commita413c99fc1e49db4db27f4bf0f7791011b4e2132
treec927f3582ead88199a513cd7664f7924cf28b580
parent5189e3126eb136a2cffacc708f08ca4fe86ebcf4
drm/i915: add gtt misalignment test

add test to check handling of misaligned offsets and sizes

v4:
* remove spurious blank lines
* explicitly cast intel_region_id to intel_memory_type in misaligned_pin
Reported-by: kernel test robot <lkp@intel.com>
v6:
* use NEEDS_COMPACT_PT instead of hard coding for DG2
v7:
* use i915_vma_unbind_unlocked in misalignment test
v8:
* handle stolen smem region returning -ENODEV due to
  uninitialized on some setups
* avoid trying to test bad alignments on single page hole regions

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220218184752.7524-9-ramalingam.c@intel.com
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c