clk: qcom: cmnpll: Add IPQ5424 SoC support
authorLuo Jie <quic_luoj@quicinc.com>
Tue, 10 Jun 2025 10:35:19 +0000 (18:35 +0800)
committerBjorn Andersson <andersson@kernel.org>
Wed, 18 Jun 2025 22:17:43 +0000 (17:17 -0500)
commita2afa4c33f0a7f7f70d54a1bc5110e326753f982
tree6d70e99595427840816b864cc19653e0a46ce281
parentc1e21ccfe45d20b814acaf6e5e5b9c4ba210a188
clk: qcom: cmnpll: Add IPQ5424 SoC support

The CMN PLL in IPQ5424 SoC supplies the fixed clock to NSS at 300 MHZ
and to PPE at 375 MHZ. Other output clocks from CMN PLL on this SoC,
and their rates are same as IPQ9574.

Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20250610-qcom_ipq5424_cmnpll-v3-2-ceada8165645@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/ipq-cmn-pll.c