dt-bindings: clock: qcom,sm8450-camcc: Allow to specify two power domains
authorVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Fri, 30 May 2025 13:20:47 +0000 (18:50 +0530)
committerBjorn Andersson <andersson@kernel.org>
Tue, 10 Jun 2025 17:59:19 +0000 (12:59 -0500)
commita02a8f8cb7f6f54b077a6f9eb74ccd840b472416
tree114d888911ba9ba0af69c4572e970205d383bc34
parent1a42f4d4bb92ea961c58599bac837fb8b377a296
dt-bindings: clock: qcom,sm8450-camcc: Allow to specify two power domains

To configure the camera PLLs and enable the camera GDSCs on SM8450, SM8475,
SM8550 and SM8650 platforms, the MXC rail must be ON along with MMCX.
Therefore, update the camcc bindings to include the MXC power domain on
these platforms.

Fixes: 9cbc64745fc6 ("dt-bindings: clock: qcom: Add SM8550 camera clock controller")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-2-02303b3a582d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml