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phy: qcom: qmp-pcie: Add Gen4 4-lanes mode for X1E80100
authorAbel Vesa <abel.vesa@linaro.org>
Fri, 23 Aug 2024 07:04:16 +0000 (10:04 +0300)
committerVinod Koul <vkoul@kernel.org>
Thu, 29 Aug 2024 18:09:01 +0000 (23:39 +0530)
commit9dab00ee95447b286ebb0ada3a5edc00beab3750
tree9881575405eb4c1684a5bbe500fe966e15edc4eetree
parent0c5f4d23f77631f657b60ef660676303f7620688commit | diff
phy: qcom: qmp-pcie: Add Gen4 4-lanes mode for X1E80100

The sixth PCIe controller on X1E80100 can be used in either
4-lanes mode or 2-lanes mode. Add the configuration and compatible
for the 4-lane mode.

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20240823-x1e80100-phy-add-gen4x4-v3-2-b7765631ca01@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)