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soc: sifive: ccache: determine the cache level from dts
authorZong Li <zong.li@sifive.com>
Tue, 13 Sep 2022 06:18:13 +0000 (06:18 +0000)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 13 Oct 2022 18:06:52 +0000 (11:06 -0700)
commit95f196f3212bbc258611c22865aef12b98304e1d
tree321d5ce09cc0b5df627463d0b0d942963ec518f0tree | snapshot
parentca120a79cf5a3323172c82e77efd70ae10d120efcommit | diff
soc: sifive: ccache: determine the cache level from dts

Composable cache could be L2 or L3 cache, use 'cache-level' property of
device node to determine the level.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220913061817.22564-4-zong.li@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
drivers/soc/sifive/sifive_ccache.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)