Merge branch 'clk-fixes' into clk-next
authorStephen Boyd <sboyd@codeaurora.org>
Thu, 3 Aug 2017 01:38:01 +0000 (18:38 -0700)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 3 Aug 2017 01:38:01 +0000 (18:38 -0700)
commit8e7be401f2f57673d71a9adf7dd8a9b58ae4e955
tree5772b116f3198d203d648437336a9c5ad1072412
parent1667393126d7c51fad8b3cb9d3798e8e0367e2ec
parentf54d2cd3c1a231e00732442fca329341d4f4250b
Merge branch 'clk-fixes' into clk-next

* clk-fixes:
  clk: keystone: sci-clk: Fix sci_clk_get
  clk: meson: mpll: fix mpll0 fractional part ignored
  clk: samsung: exynos5420: The EPLL rate table corrections
  clk: sunxi-ng: sun5i: Add clk_set_rate_parent to the CPU clock
drivers/clk/sunxi-ng/ccu-sun5i.c