riscv: add SpacemiT SoC family Kconfig support
authorYangyu Chen <cyy@cyyself.name>
Tue, 30 Jul 2024 00:28:10 +0000 (00:28 +0000)
committerYixun Lan <dlan@gentoo.org>
Thu, 16 Jan 2025 23:53:51 +0000 (07:53 +0800)
commit8814aa123adb373f66025cda80da94b59e849313
treec0c37c4fda02c41ac6acc714541a886a00520ad4
parentdfe6d083edff9f577f2e3db02fe5a838118fc0ac
riscv: add SpacemiT SoC family Kconfig support

The first SoC in the SpacemiT series is K1, which contains 8 RISC-V
cores with RISC-V Vector v1.0 support.

Link: https://www.spacemit.com/en/spacemit-key-stone-2/
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
arch/riscv/Kconfig.socs