clk: jz4725b: fix mmc0 clock gating
authorSiarhei Volkau <lis8215@gmail.com>
Sat, 5 Feb 2022 17:18:49 +0000 (20:18 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 2 Mar 2022 10:42:46 +0000 (11:42 +0100)
commit84e303b4d53fb348cb9179d35ddac3c71d7cfbf5
tree5b55b0f0f7453f7d1223d1d4fdbbb76e8d9097d5
parent72a5b01875b279196b30af9cca737318fbf3f634
clk: jz4725b: fix mmc0 clock gating

commit 2f0754f27a230fee6e6d753f07585cee03bedfe3 upstream.

The mmc0 clock gate bit was mistakenly assigned to "i2s" clock.
You can find that the same bit is assigned to "mmc0" too.
It leads to mmc0 hang for a long time after any sound activity
also it  prevented PM_SLEEP to work properly.
I guess it was introduced by copy-paste from jz4740 driver
where it is really controls I2S clock gate.

Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver")
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Tested-by: Siarhei Volkau <lis8215@gmail.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220205171849.687805-2-lis8215@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/clk/ingenic/jz4725b-cgu.c