drm/amd/display: Don't allow IPS2 in D0 for RCG Dynamic
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Wed, 13 Nov 2024 18:32:36 +0000 (13:32 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 10 Dec 2024 15:26:49 +0000 (10:26 -0500)
commit8488646966fe59ae9fca79af47895ff40adeb7ee
tree7ea85bc930917832abb30cf44d4afc6cf3ae3c09
parent70fec46519fca859aa209f5f02e7e0a0123aca4a
drm/amd/display: Don't allow IPS2 in D0 for RCG Dynamic

[Why]
The existing changes to the DPMS off flag should help reduce
accidental entry, but this change further restricts the entry condition.

[How]
Record last power state as sent to DMUB.
Don't send IPS2 allow if it's D0.

Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h