iommu/amd: Fix argument order in amd_iommu_dev_flush_pasid_all()
authorEliav Bar-ilan <eliavb@nvidia.com>
Tue, 10 Sep 2024 19:44:16 +0000 (16:44 -0300)
committerJoerg Roedel <jroedel@suse.de>
Thu, 12 Sep 2024 07:20:18 +0000 (09:20 +0200)
commit8386207f37e98453e1de3f51e50eeeea089103f9
treed7a00911af6b5c5a6dd4c739eaa4aff2ab381392
parentda3ea35007d0af457a0afc87e84fddaebc4e0b63
iommu/amd: Fix argument order in amd_iommu_dev_flush_pasid_all()

An incorrect argument order calling amd_iommu_dev_flush_pasid_pages()
causes improper flushing of the IOMMU, leaving the old value of GCR3 from
a previous process attached to the same PASID.

The function has the signature:

void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,
     ioasid_t pasid, u64 address, size_t size)

Correct the argument order.

Cc: stable@vger.kernel.org
Fixes: 474bf01ed9f0 ("iommu/amd: Add support for device based TLB invalidation")
Signed-off-by: Eliav Bar-ilan <eliavb@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Link: https://lore.kernel.org/r/0-v1-fc6bc37d8208+250b-amd_pasid_flush_jgg@nvidia.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
drivers/iommu/amd/iommu.c