drm/amd/display: Parse scanline registers
authorSylvia Tsai <sylvia.tsai@amd.com>
Tue, 11 Apr 2017 19:15:28 +0000 (15:15 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 21:23:47 +0000 (17:23 -0400)
commit81c509633aa93442d58b895f773892b3e8d936cf
treee3a42a842efa15b5863092ddb15d00889bfc2082
parent1ce71fcd5dddf4a3198a96e422122edc210847e9
drm/amd/display: Parse scanline registers

They could differ between ASIC generations

Signed-off-by: Sylvia Tsai <sylvia.tsai@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/dc/core/dc_stream.c
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h