dmaengine: fsl-edma: fix wrong tcd endianness for big-endian cpu
authorAngelo Dureghello <angelo.dureghello@timesys.com>
Wed, 1 Jul 2020 22:52:05 +0000 (00:52 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 29 Jul 2020 08:19:51 +0000 (10:19 +0200)
commit7ee49b3743183b11a42e811bc8b27485c85bc408
treeca907fc5075d1f4fca9416499c7d5382ed07a757
parentcc44aa06e0fed419486ad30965cbafffa0c93e8c
dmaengine: fsl-edma: fix wrong tcd endianness for big-endian cpu

[ Upstream commit 8678c71c17721e0f771f135967ef0cce8f69ce9a ]

Due to recent fixes in m68k arch-specific I/O accessor macros, this
driver is not working anymore for ColdFire. Fix wrong tcd endianness
removing additional swaps, since edma_writex() functions should already
take care of any eventual swap if needed.

Note, i could only test the change in ColdFire mcf54415 and Vybrid
vf50 / Colibri where i don't see any issue. So, every feedback and
test for all other SoCs involved is really appreciated.

Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Reported-by: kbuild test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20200701225205.1674463-1-angelo.dureghello@timesys.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/dma/fsl-edma-common.c