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(parent: 6ecb8e5) | patch
drm/i915/display: Add PHY_CMN1_CONTROL register definitions
authorJouni Högander <jouni.hogander@intel.com>
Mon, 26 May 2025 12:05:09 +0000 (15:05 +0300)
committerJouni Högander <jouni.hogander@intel.com>
Thu, 29 May 2025 05:13:43 +0000 (08:13 +0300)
commit7acc76a37e5d5743102784be82e6ae6dd784043c
tree4754528dd1d82d13c408c5eb80f12aec6e7fd511tree
parent6ecb8e586f8339657211e12fcba7f77bae297fddcommit | diff
drm/i915/display: Add PHY_CMN1_CONTROL register definitions

Add PHY_CMN1_CONTROL register and its definitions to configure port LFPS
sending.

Bspec: 68962
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://lore.kernel.org/r/20250526120512.1702815-10-jouni.hogander@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)