drm/amd/display: move dccg programming from link hwss hpo dp to hwss
authorWenjing Liu <wenjing.liu@amd.com>
Mon, 5 Dec 2022 23:05:46 +0000 (18:05 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 3 Jan 2023 21:57:57 +0000 (16:57 -0500)
commit7462475e3a06fbb0b36243b391296f9f411e9041
tree5b3834500bdff5f0bc79f1b46bbf80650d759645
parent324de40a56550e22b0a5ec40442ee13d5a0e7688
drm/amd/display: move dccg programming from link hwss hpo dp to hwss

[why] dccg clock programming shouldn't be part of link hwss programming
sequence. The scope of link hwss is limited to encoder and phy
programming.

Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_dp.c