drm/i915/ringbuffer: Delay after invalidating gen6+ xcs
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 30 Aug 2018 16:10:42 +0000 (17:10 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 30 Aug 2018 17:26:48 +0000 (18:26 +0100)
commit70b73f9ac113983f9c7db9887447f1344ac5b69b
tree133323ecd9f200a55403d8d562e2039ea6bd81b1
parent096055487115883dc82fdebb5d16444585e4fc24
drm/i915/ringbuffer: Delay after invalidating gen6+ xcs

During stress testing of full-ppgtt (on Baytrail at least), we found
that the invalidation around a context/mm switch was insufficient (writes
would go astray). Adding a second MI_FLUSH_DW barrier prevents this, but
it is unclear as to whether this is merely a delaying tactic or if it is
truly serialising with the TLB invalidation. Either way, it is
empirically required.

v2: Avoid the loop for readability;

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107715
References: https://bugs.freedesktop.org/show_bug.cgi?id=107759
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180830161042.29193-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/intel_ringbuffer.c