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(parent: a1e062a) | patch
pwm: lpss: Clarify the bypass member semantics in struct pwm_lpss_boardinfo
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Mon, 10 Feb 2025 19:44:50 +0000 (21:44 +0200)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 11 Feb 2025 14:25:41 +0000 (16:25 +0200)
commit6edf3152bd4c2bc58e3705872642e282d8b3eeb9
tree14399146e39090523b80e6263ccf4aceb5d711d6tree
parenta1e062ab4a1f19bb0e94093ef90ab9a74f1f7744commit | diff
pwm: lpss: Clarify the bypass member semantics in struct pwm_lpss_boardinfo

Instead of an odd comment, cite the documentation, which says more clearly
what's going on with the programming flow on some of the Intel SoCs.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
include/linux/platform_data/x86/pwm-lpss.h diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)