spi: amd: Limit max transfer and message size
authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>
Wed, 6 Jul 2022 10:06:22 +0000 (13:06 +0300)
committerMark Brown <broonie@kernel.org>
Wed, 6 Jul 2022 14:20:46 +0000 (15:20 +0100)
commit6ece49c56965544262523dae4a071ace3db63507
tree4ac34373a4bcaa17b5a39a7367f05f5eb2e4d264
parentf2906aa863381afb0015a9eb7fefad885d4e5a56
spi: amd: Limit max transfer and message size

Enabling the SPI CS35L41 audio codec driver for Steam Deck [1]
revealed a problem with the current AMD SPI controller driver
implementation, consisting of an unrecoverable system hang.

The issue can be prevented if we ensure the max transfer size
and the max message size do not exceed the FIFO buffer size.

According to the implementation of the downstream driver, the
AMD SPI controller is not able to handle more than 70 bytes per
transfer, which corresponds to the size of the FIFO buffer.

Hence, let's fix this by setting the SPI limits mentioned above.

[1] https://lore.kernel.org/r/20220621213819.262537-1-cristian.ciocaltea@collabora.com

Reported-by: Anastasios Vacharakis <vacharakis@o2mail.de>
Fixes: bbb336f39efc ("spi: spi-amd: Add AMD SPI controller driver support")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20220706100626.1234731-2-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-amd.c