drm/amdgpu: improve wait logic at fence polling
authorAlex Sierra <alex.sierra@amd.com>
Mon, 24 Apr 2023 19:27:26 +0000 (14:27 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:39:06 +0000 (09:39 -0400)
commit6e87c4229513904295674b84b6e2d12951567191
tree05a653ef80a828c1bd1d63ee6a49608708c338d9
parent17d62410aec363ec972f532fed5aba89b3f59ae7
drm/amdgpu: improve wait logic at fence polling

Accomplish this by reading the seq number right away instead of sleep
for 5us. There are certain cases where the fence is ready almost
immediately. Sleep number granularity was also reduced as the majority
of the kiq tlb flush takes between 2us to 6us.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c