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arm64: dts: qcom: sc7280: Add 0xac Adreno speed bin
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Mon, 20 Nov 2023 12:12:55 +0000 (13:12 +0100)
committerBjorn Andersson <andersson@kernel.org>
Thu, 7 Dec 2023 16:37:45 +0000 (08:37 -0800)
commit6a7f8c635dab30233df93b5566d4169ed956b71b
tree6628d59d841f4b0b57dc91bdd096599e7b152c30tree | snapshot
parent31edad478534186a2718be9206ce7b19f2735f6ecommit | diff
arm64: dts: qcom: sc7280: Add 0xac Adreno speed bin

A643 (A635 speedbin 0xac) tops out at 812 MHz. Fill in the
opp-supported-hw appropriately.

Note that fuseval 0xac is referred to as speedbin 1 downstream, but
that was already in use upstream, so 2 was chosen instead.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230926-topic-a643-v2-4-06fa3d899c0a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sc7280.dtsi diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)