ARM: dts: meson: fix PHY deassert timing requirements
authorStefan Agner <stefan@agner.ch>
Mon, 7 Dec 2020 17:58:01 +0000 (18:58 +0100)
committerKevin Hilman <khilman@baylibre.com>
Mon, 7 Dec 2020 19:12:49 +0000 (11:12 -0800)
commit656ab1bdcd2b755dc161a9774201100d5bf74b8d
tree0a0d5e3f56d66136b9eb21cf4e6116e300ccf176
parentc183c406c4321002fe85b345b51bc1a3a04b6d33
ARM: dts: meson: fix PHY deassert timing requirements

According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. On similar boards with the same PHY this fixes an issue where
Ethernet link would not come up when using ip link set down/up.

Fixes: a2c6e82e5341 ("ARM: dts: meson: switch to the generic Ethernet PHY reset bindings")
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> # on Odroid-C1+
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/ff78772b306411e145769c46d4090554344db41e.1607363522.git.stefan@agner.ch
arch/arm/boot/dts/meson8b-odroidc1.dts
arch/arm/boot/dts/meson8m2-mxiii-plus.dts