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(parent: 8740196) | patch
drm/amd/display: align DCLK to voltage level
authorTony Cheng <tony.cheng@amd.com>
Wed, 27 Sep 2017 13:20:51 +0000 (09:20 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 21 Oct 2017 20:44:13 +0000 (16:44 -0400)
commit6512387a54357c5d3fbea8995d8879ea817a5ec6
tree825e2e0b27725caf9f4f7eec8d0a72dbe08b973ctree | snapshot
parent8740196935625dfb171ab115120315060e4a8a41commit | diff
drm/amd/display: align DCLK to voltage level

in past program SMU will use all voltage headroom.  RV does not

if DAL need higher voltage for DCFCLK or DISPCLK, also increase FCLK
to improve stutter as voltage is already

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c diff | blob | blame | history
drivers/gpu/drm/amd/display/dc/dc.h diff | blob | blame | history
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)