drm/i915/psr: Calculate PIPE_SRCSZ_ERLY_TPT value
authorJouni Högander <jouni.hogander@intel.com>
Tue, 19 Mar 2024 12:33:23 +0000 (14:33 +0200)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 3 Apr 2024 18:26:09 +0000 (14:26 -0400)
commit64d845f651267deb62bcf013ce37e2360161fdf1
tree4ded40623ce07f7309514dfcdd56403dccb8e626
parentcaf3d748f646889425312897e81307441160d485
drm/i915/psr: Calculate PIPE_SRCSZ_ERLY_TPT value

When early transport is enabled we need to write PIPE_SRCSZ_ERLY_TPT on
every flip doing selective update. This patch calculates
PIPE_SRCSZ_ERLY_TPT same way as is done for PSR2_MAN_TRK_CTL value and
stores i in intel_crtc_state->pipe_srcsz_early_tpt to be written later
during flip.

Bspec: 68927

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-2-jouni.hogander@intel.com
(cherry picked from commit f3b899f0b4b17fa0b20e27c23f78604d5686383d)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_psr.c