drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency
authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Thu, 27 Feb 2025 03:41:06 +0000 (09:11 +0530)
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Thu, 13 Mar 2025 11:00:54 +0000 (16:30 +0530)
commit5d6c69b712f9cb34063ef32168ce6a12af8acf0c
tree0bc6ae2872b7dc71cfdf7d5c7bac278d7cda074a
parent6ace085c453ccdcad34e64eead21eb120270c383
drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency

Currently, during the computation of global watermarks, the latency for
each scaler user is calculated to compute the DSC prefill latency.
At this point, the number of scaler users can exceed the number of
supported scalers, which is checked later in intel_atomic_setup_scalers().

This can cause issues when the number of scaler users exceeds the number
of supported scalers.

While checking for DSC prefill, ensure that the number of scaler users does
not exceed the number of supported scalers.

Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/4341
Fixes: a9b14af999b0 ("drm/i915/dsc: Check if vblank is sufficient for dsc prefill")
Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250227034106.1638203-1-ankit.k.nautiyal@intel.com
drivers/gpu/drm/i915/display/skl_watermark.c