arm64: dts: st: introduce stm32mp25 SoCs family
authorAlexandre Torgue <alexandre.torgue@foss.st.com>
Wed, 7 Oct 2020 13:29:52 +0000 (15:29 +0200)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Thu, 8 Jun 2023 14:01:45 +0000 (16:01 +0200)
commit5d30d03aaf78586c37100006ba271d045f730bb5
tree530616ecb5c1b52798a0a4dd528eb12db631e0c0
parent9e4e24414cc6b45bd887d746a59691e295431ddf
arm64: dts: st: introduce stm32mp25 SoCs family

STM32MP25 family is composed of 4 SoCs defined as following:

-STM32MP251: common part composed of 1*Cortex-A35, common peripherals like
SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...

-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and
LVDS display.

-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).

A second diversity layer exists for security features/ A35 frequency:
-STM32MP25xY, "Y" gives information:
 -Y = A means A35@1.2GHz + no cryp IP and no secure boot.
 -Y = C means A35@1.2GHz + cryp IP and secure boot.
 -Y = D means A35@1.5GHz + no cryp IP and no secure boot.
 -Y = F means A35@1.5GHz + cryp IP and secure boot.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm64/boot/dts/st/stm32mp251.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp253.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp255.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp257.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp25xc.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp25xf.dtsi [new file with mode: 0644]