iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU
authorJordan Crouse <jcrouse@codeaurora.org>
Mon, 9 Nov 2020 18:47:25 +0000 (11:47 -0700)
committerWill Deacon <will@kernel.org>
Tue, 10 Nov 2020 12:25:49 +0000 (12:25 +0000)
commit5c7469c66f953a2eb223468d7aa40062af9c14ab
treeeb8dc032b97c02c1005c210ecd4749c50d8a5cb7
parent3045fe45abbcba2ae4c3ce9b3c610523651be1c7
iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU

Add a special implementation for the SMMU attached to most Adreno GPU
target triggered from the qcom,adreno-smmu compatible string.

The new Adreno SMMU implementation will enable split pagetables
(TTBR1) for the domain attached to the GPU device (SID 0) and
hard code it context bank 0 so the GPU hardware can implement
per-instance pagetables.

Co-developed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201109184728.2463097-2-jcrouse@codeaurora.org
Signed-off-by: Will Deacon <will@kernel.org>
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
drivers/iommu/arm/arm-smmu/arm-smmu.h