PCI/CXL: Add 'cxl_bus' reset method for devices below CXL Ports
authorDave Jiang <dave.jiang@intel.com>
Thu, 2 May 2024 16:57:33 +0000 (09:57 -0700)
committerBjorn Helgaas <bhelgaas@google.com>
Wed, 8 May 2024 18:25:43 +0000 (13:25 -0500)
commit53c49b6e6dd2ebc1d3257ae838e067699229bc8d
tree38fef0ebcfe00b0a7043689b7798b5f2d44478ba
parentb1956e2d0713e210a56ae65ad3488ae36f833e76
PCI/CXL: Add 'cxl_bus' reset method for devices below CXL Ports

By default Secondary Bus Reset (SBR) is masked for CXL Ports (see CXL r3.1,
sec 8.1.5.2).

Add cxl_reset_bus_function() (method "cxl_bus") to set the "Unmask SBR" bit
in the upstream CXL Port before performing the bus reset and restore the
original value afterwards.

This method allows the user to perform a bus reset on a CXL device without
needing to set the "Unmask SBR" bit via a user tool.

Link: https://lore.kernel.org/r/20240502165851.1948523-5-dave.jiang@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
[bhelgaas: simplify commit log, invert condition to avoid negation]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
drivers/pci/pci.c
include/linux/pci.h