clk: qcom: videocc-sm8450: Move PLL & clk configuration to really probe
authorJagadeesh Kona <quic_jkona@quicinc.com>
Fri, 30 May 2025 13:20:52 +0000 (18:50 +0530)
committerBjorn Andersson <andersson@kernel.org>
Tue, 10 Jun 2025 17:59:19 +0000 (12:59 -0500)
commit512af5bf312efe09698de0870e99c0cec4d13e21
treea9cc6c805c8df0dd39ae8a3dd6d28a16d8861575
parent452ae64997dd1db1fe9bec2e7bd65b33338e7a6b
clk: qcom: videocc-sm8450: Move PLL & clk configuration to really probe

Video PLLs on SM8450/SM8475 require both MMCX and MXC rails to be kept ON
to configure the PLLs properly. Hence move runtime power management, PLL
configuration and enable critical clocks to qcom_cc_really_probe() which
ensures all required power domains are in enabled state before configuring
the PLLs or enabling the clocks.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-7-02303b3a582d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/videocc-sm8450.c