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RISC-V: Enable SBI based earlycon support
authorAnup Patel <apatel@ventanamicro.com>
Fri, 24 Nov 2023 07:09:05 +0000 (12:39 +0530)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 10 Jan 2024 15:04:06 +0000 (07:04 -0800)
commit50942ad6ddb57d3cfe2e4fc1f08714d54b2565ef
treeb864de67cc86e031f8f6d117502452a388c3e3d4tree | snapshot
parent88ead68e764cd164abb965e258c4e18841433ecfcommit | diff
RISC-V: Enable SBI based earlycon support

Let us enable SBI based earlycon support in defconfig for both RV32
and RV64 so that "earlycon=sbi" can be used again.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20231124070905.1043092-6-apatel@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/configs/defconfig diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)