drm/i915: Require an exact DP link freq match for the DG2 PLL
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 3 May 2022 18:22:39 +0000 (21:22 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 31 May 2022 18:04:46 +0000 (21:04 +0300)
commit4f543d664cec7e9b490bca55f57151afe6f5cf47
tree5e23dce6eca72359c54db95a397eb0d736bb74c8
parentf2206df8ec862073995f5d27f0f55f698843a9b8
drm/i915: Require an exact DP link freq match for the DG2 PLL

No idea why the DG2 PLL DP link frequency calculation is allowing
a non-exact match. That makes no sense so get rid of it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220503182242.18797-24-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Matt Roper <matthew.d.roper@intel.com>
drivers/gpu/drm/i915/display/intel_snps_phy.c