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pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36
authorTomer Maimon <tmaimon77@gmail.com>
Tue, 16 Jul 2024 19:40:05 +0000 (22:40 +0300)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 5 Aug 2024 07:32:34 +0000 (09:32 +0200)
commit4edcebbb4399ebd10f7c05293cdd74b598c7fd96
tree47392cb0ba92dfd30ad662c40b38574b1a2be849tree
parent92f5f86b064f1c50c33c74cb087bfbe3e53479d0commit | diff
pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36

This patch adds support for GPIO pins GPI35 and GPI36 on the Nuvoton
NPCM8xx BMC SoC.

The pins are configured for only for input.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-5-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)