drm/i915: Use per-plane VT-d guard numbers
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 22 Jan 2025 15:17:54 +0000 (17:17 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 6 Feb 2025 13:40:16 +0000 (15:40 +0200)
commit4d291c441bbc78805e6a4775383bd5a6f53d2e10
tree0ba23a40e6c06ec1af7027172776a6e848b15803
parent44a34dec43e8f214913e16204525d7253acc1891
drm/i915: Use per-plane VT-d guard numbers

Bspec lists different VT-d guard numbers (the number of dummy
padding PTEs) for different platforms and plane types. Use those
instead of just assuming the max glk+ number for everything.
This could avoid a bit of overhead on older platforms due to
reduced padding, and it makes it easier to cross check with the
spec.

Note that VLV/CHV do not document this w/a at all, so not sure
if it's actually needed or not. Nor do we actually know how much
padding is required if it is needed. For now use the same 128
PTEs that we use for snb-bdw primary planes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250122151755.6928-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/i9xx_plane.c
drivers/gpu/drm/i915/display/intel_cursor.c
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_fb.c
drivers/gpu/drm/i915/display/intel_sprite.c
drivers/gpu/drm/i915/display/skl_universal_plane.c