drm/i915: Reoder gen9+ timestamp freq register bits
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 11 Feb 2025 23:19:40 +0000 (01:19 +0200)
committerAndi Shyti <andi.shyti@linux.intel.com>
Tue, 4 Mar 2025 14:39:38 +0000 (15:39 +0100)
commit463c93a18cef8a0b22d4eea1611e1ed31c1f97c6
tree8bdf4317661fa36388935c621b84d342c571200c
parent26a4463e61f1a38187b82ef871ce1222d9e1c878
drm/i915: Reoder gen9+ timestamp freq register bits

We customarily define the bits of a register in big endian
order. Reorder the gen9+ timestamp freq register bits to match.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250211231941.22769-13-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/gt/intel_gt_regs.h