drm/i915/xe2lpd: Re-order DP AUX regs
authorLucas De Marchi <lucas.demarchi@intel.com>
Tue, 19 Sep 2023 19:21:18 +0000 (12:21 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Thu, 21 Sep 2023 15:18:02 +0000 (08:18 -0700)
commit449f87e66df299a1b79567352cba1f5b29421fba
tree0ea0fad93db37c330d8324b01f446861fa3a2e7b
parent858c19720c9ab6db003afc9e2ce8b1bfd3c32644
drm/i915/xe2lpd: Re-order DP AUX regs

The address of CTL and DATA registers for DP AUX were changed in Xe2_LPD:
now they are all in a single range, with CH_A and CH_B coming right after
the USBC instances. Like was done when moving registers to PICA, use
a helper macro to remap the ch passed to an index that can be used to
calculate the right offset.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230919192128.2045154-12-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_display_power_well.c
drivers/gpu/drm/i915/display/intel_dp_aux.c
drivers/gpu/drm/i915/display/intel_dp_aux_regs.h