qed: Fix TM block ILT allocation
authorMichal Kalderon <Michal.Kalderon@cavium.com>
Mon, 3 Apr 2017 09:21:10 +0000 (12:21 +0300)
committerDavid S. Miller <davem@davemloft.net>
Tue, 4 Apr 2017 02:16:37 +0000 (19:16 -0700)
commit44531ba45dbf3c23cc7ae0934ec9b33ef340ac56
treefcba4d25409af008a9f2ced8d785533d57a986dd
parentb5a9ee7cf3be118ad9064583c2a0f10195ca422a
qed: Fix TM block ILT allocation

When configuring the HW timers block we should set the number of CIDs
up until the last CID that require timers, instead of only those CIDs
whose protocol needs timers support.

Today, the protocols that require HW timers' support have their CIDs
before any other protocol, but that would change in future [when we
add iWARP support].

Signed-off-by: Michal Kalderon <Michal.Kalderon@cavium.com>
Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/qlogic/qed/qed_cxt.c