clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
authorYassine Oudjana <y.oudjana@protonmail.com>
Thu, 17 Oct 2024 07:17:06 +0000 (10:17 +0300)
committerStephen Boyd <sboyd@kernel.org>
Thu, 17 Oct 2024 19:24:35 +0000 (12:24 -0700)
commit43c04ed79189214e478c4c0f82319e94ba30c756
tree7911dd95d06b7b970bceb8c94fd3ac248f366640
parentea1cca026842bc83af92785e61a4433bcc71ea70
clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers

Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg
clock and reset controllers. These provide the base clocks and resets
on the platform, enough to bring up all essential blocks including
PWRAP, MSDC and peripherals (UART, I2C, SPI).

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
MAINTAINERS
drivers/clk/mediatek/Kconfig
drivers/clk/mediatek/Makefile
drivers/clk/mediatek/clk-mt6735-apmixedsys.c [new file with mode: 0644]
drivers/clk/mediatek/clk-mt6735-infracfg.c [new file with mode: 0644]
drivers/clk/mediatek/clk-mt6735-pericfg.c [new file with mode: 0644]
drivers/clk/mediatek/clk-mt6735-topckgen.c [new file with mode: 0644]