clk: qcom: camcc-sm8650: Move PLL & clk configuration to really probe
authorJagadeesh Kona <quic_jkona@quicinc.com>
Fri, 30 May 2025 13:20:56 +0000 (18:50 +0530)
committerBjorn Andersson <andersson@kernel.org>
Tue, 10 Jun 2025 17:59:20 +0000 (12:59 -0500)
commit3f8dd231e60b706fc9395edbf0186b7a0756f45d
tree277379661f44bc5b78b526d2c7f41ea3f0aa69e0
parentadb50c762f3a513a363d91722dbd8d1b4afc5f10
clk: qcom: camcc-sm8650: Move PLL & clk configuration to really probe

Camera PLLs on SM8650 require both MMCX and MXC rails to be kept ON
to configure the PLLs properly. Hence move runtime power management,
PLL configuration and enabling critical clocks to qcom_cc_really_probe()
which ensures all required power domains are in enabled state before
configuring the PLLs or enabling the clocks.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-11-02303b3a582d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/camcc-sm8650.c