libnvdimm/nvdimm/flush: Allow architecture to override the flush barrier
authorAneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Wed, 1 Jul 2020 07:22:32 +0000 (12:52 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 16 Jul 2020 03:00:22 +0000 (13:00 +1000)
commit3e79f082ebfc130360bcee23e4dd74729dcafdf4
tree472f72323b983f91d8e078b32544e197c6e4848d
parentd358042793183a57094dac45a44116e1165ac593
libnvdimm/nvdimm/flush: Allow architecture to override the flush barrier

Architectures like ppc64 provide persistent memory specific barriers
that will ensure that all stores for which the modifications are
written to persistent storage by preceding dcbfps and dcbstps
instructions have updated persistent storage before any data
access or data transfer caused by subsequent instructions is initiated.
This is in addition to the ordering done by wmb()

Update nvdimm core such that architecture can use barriers other than
wmb to ensure all previous writes are architecturally visible for
the platform buffer flush.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200701072235.223558-5-aneesh.kumar@linux.ibm.com
Documentation/memory-barriers.txt
drivers/md/dm-writecache.c
drivers/nvdimm/region_devs.c
include/asm-generic/barrier.h