ASoC: fsl_sai: MCLK bind with TX/RX enable bit
authorShengjiu Wang <shengjiu.wang@nxp.com>
Fri, 5 May 2023 07:55:22 +0000 (15:55 +0800)
committerMark Brown <broonie@kernel.org>
Sun, 7 May 2023 23:48:53 +0000 (08:48 +0900)
commit3e4a826129980fed0e3e746a7822f2f204dfc24a
tree9da7a1e787731b8eaec00f7111fb8a0f6e3296f3
parent101b23830d3c26e9549274d16e8d4542c8bce4af
ASoC: fsl_sai: MCLK bind with TX/RX enable bit

On i.MX8MP, the sai MCLK is bound with TX/RX enable bit,
which means the TX/RE enable bit need to be enabled then
MCLK can be output on PAD.

Some codec (for example: WM8962) needs the MCLK output
earlier, otherwise there will be issue for codec
configuration.

Add new soc data "mclk_with_tere" for this platform and
enable the MCLK output in startup stage.

As "mclk_with_tere" only applied to i.MX8MP, currently
The soc data is shared with i.MX8MN, so need to add
an i.MX8MN own soc data with "mclk_with_tere" disabled.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Link: https://lore.kernel.org/r/1683273322-2525-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org
sound/soc/fsl/fsl_sai.c
sound/soc/fsl/fsl_sai.h