arm64: dts: meson: g12a: x96-max: fix PHY deassert timing requirements
authorStefan Agner <stefan@agner.ch>
Mon, 7 Dec 2020 17:58:02 +0000 (18:58 +0100)
committerKevin Hilman <khilman@baylibre.com>
Mon, 7 Dec 2020 19:12:49 +0000 (11:12 -0800)
commit3d07c3b3a886fefd583c1b485b5e4e3c4e2da493
treec9fee80da61e23c9c89c75cc4b76175c51a87ff4
parent656ab1bdcd2b755dc161a9774201100d5bf74b8d
arm64: dts: meson: g12a: x96-max: fix PHY deassert timing requirements

According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. On similar boards with the same PHY this fixes an issue where
Ethernet link would not come up when using ip link set down/up.

Fixes: ed5e8f689154 ("arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line")
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/12506964ca5d5f936579a280ad0a7e7f9a0a2d4c.1607363522.git.stefan@agner.ch
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts