dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
authorDuy Nguyen <duy.nguyen.rh@renesas.com>
Thu, 25 Jan 2024 15:34:30 +0000 (16:34 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 31 Jan 2024 10:04:14 +0000 (11:04 +0100)
commit3bbdf8c3d32103e21d9a826e40340fa59fc579ea
tree40200a44505fe69668da30ab90aa740a8b07547d
parent2a8998479328a6eb6a2b07a68c7a756fe717b9e2
dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions

Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V4M (R8A779H0) SoC.

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be
include/dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h [new file with mode: 0644]