Merge branch 'for-6.15/features' into cxl-for-next
authorDave Jiang <dave.jiang@intel.com>
Mon, 17 Mar 2025 16:22:59 +0000 (09:22 -0700)
committerDave Jiang <dave.jiang@intel.com>
Mon, 17 Mar 2025 16:22:59 +0000 (09:22 -0700)
commit3b5d43245f0a56390baaa670e1b6d898772266b3
treec4471261f5f508f06c95230ec1cff7261c62f639
parent74d9c59658e4d3b06f163da0c5ed7647656705c1
parenta8b773f24203ef41162fc035944a82909a35f567
Merge branch 'for-6.15/features' into cxl-for-next

Add CXL Features support. Setup code for enabling in kernel usage of CXL
Features. Expecting EDAC/RAS to utilize CXL Features in kernel for
things such as memory sparing. Also prepartion for enabling of CXL FWCTL
support to issue allowed Features from user space.
drivers/cxl/Kconfig
drivers/cxl/core/Makefile
drivers/cxl/core/core.h
drivers/cxl/core/mbox.c
drivers/cxl/core/memdev.c
drivers/cxl/cxlmem.h
drivers/cxl/pci.c
tools/testing/cxl/Kbuild
tools/testing/cxl/test/mem.c