clocking-wizard: Add support for versal clocking wizard
authorShubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Thu, 14 Dec 2023 10:51:25 +0000 (16:21 +0530)
committerStephen Boyd <sboyd@kernel.org>
Sun, 17 Dec 2023 22:55:14 +0000 (14:55 -0800)
commit3a96393a46e780d14a8592d7265b5a639fa7e5c9
treef3ac894c6c22a5655317da3a3464cba67a017894
parent86b1ec23bb8132aee1ab33c98ca1849f2d1ab044
clocking-wizard: Add support for versal clocking wizard

Add support for Clocking Wizard for Versal adaptive compute
acceleration platforms. The Versal clocking wizard differs
in the programming model and the register layout.
The CLKFBOUT_1 registers are at offset of 0x200
instead of the 0x330 in Versal. In Versal clocking wizard the low and
high time is programmed instead of the divisor.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Link: https://lore.kernel.org/r/20231214105125.26919-3-shubhrajyoti.datta@amd.com
[sboyd@kernel.org: Stop initializing spinlock flags]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/xilinx/clk-xlnx-clock-wizard.c