drm/i915/cx0_phy: Update HDMI TMDS C20 algorithm value
authorDnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Tue, 17 Dec 2024 20:13:01 +0000 (01:43 +0530)
committerMatt Roper <matthew.d.roper@intel.com>
Thu, 16 Jan 2025 23:05:36 +0000 (15:05 -0800)
commit3630a47b700e65066d3c9a3b6a58af5bfca812e9
tree353c4e2992c20aff3964ca9bc639e1052d28e707
parente35ecd95ecf28478c6aeac1ab480bbc033dae9c9
drm/i915/cx0_phy: Update HDMI TMDS C20 algorithm value

In the C20 algorithm for HDMI TMDS, certain fields have been updated
in the BSpec to set values for SRAM_GENERIC_<A/B>_TX_CNTX_CFG_1,
such as tx_misc and dac_ctrl_range for Xe2LPD, Xe2HPD and MTL/ARL.
This patch covers fields that need to be set based on the platform type.

Some ARLs SoCs cannot be directly distinguished by their GMD version Id,
Specifically to set value of tx_misc, so PCI Host Bridge IDs are used
for differentiation.

v2:
- Relocate defines and Restructure the code(Jani)

v3:
- Replace conditions with display.platform.<platform> (jani)
- Move host bridge check to new function (Jani)

v4:
- Identify/Replace arrowlake_u as meteorlake_u(Jani)

Bspec:74165,74491
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241217201301.3593054-3-dnyaneshwar.bhadane@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c
drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
drivers/gpu/drm/i915/display/intel_display_device.h