media: ccs-pll: Fix VT post-PLL divisor calculation
authorSakari Ailus <sakari.ailus@linux.intel.com>
Tue, 15 Sep 2020 19:04:26 +0000 (21:04 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Mon, 7 Dec 2020 15:03:26 +0000 (16:03 +0100)
commit36154b68b8d9c4a3d771c0d2c58be03927350480
tree92659c5555c6265378e698aedf9509353bfb47f0
parent594f1e93bb2c48bcc14a020448b46eed15be7ef7
media: ccs-pll: Fix VT post-PLL divisor calculation

The PLL calculator only searched even total divisor values apart from one,
but this is wrong: the total divisor is odd in cases where system divisor
is one. Fix this by including odd total PLL values where system divisor is
one to the search.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/i2c/ccs-pll.c