iommu/mediatek: Add REG_MMU_WR_LEN_CTRL register definition
authorChao Hao <chao.hao@mediatek.com>
Fri, 3 Jul 2020 04:41:24 +0000 (12:41 +0800)
committerJoerg Roedel <jroedel@suse.de>
Fri, 10 Jul 2020 14:13:11 +0000 (16:13 +0200)
commit35c1b48d27dac486835435e703749236b14dcd8f
tree9f2520ae0d9d6a65dc6a176a5d62a1ffcb6d41a7
parent37276e00da7d3a0d643d325aef81b7283fe23010
iommu/mediatek: Add REG_MMU_WR_LEN_CTRL register definition

Some platforms(ex: mt6779) need to improve performance by setting
REG_MMU_WR_LEN_CTRL register. And we can use WR_THROT_EN macro to control
whether we need to set the register. If the register uses default value,
iommu will send command to EMI without restriction, when the number of
commands become more and more, it will drop the EMI performance. So when
more than ten_commands(default value) don't be handled for EMI, iommu will
stop send command to EMI for keeping EMI's performace by enabling write
throttling mechanism(bit[5][21]=0) in MMU_WR_LEN_CTRL register.

Signed-off-by: Chao Hao <chao.hao@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20200703044127.27438-8-chao.hao@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
drivers/iommu/mtk_iommu.c
drivers/iommu/mtk_iommu.h