crypto: qat - enable rate limiting feature for GEN6 devices
authorSuman Kumar Chakraborty <suman.kumar.chakraborty@intel.com>
Thu, 10 Jul 2025 13:33:47 +0000 (14:33 +0100)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 18 Jul 2025 10:52:00 +0000 (20:52 +1000)
commit3471c899fd6be69383aa2b52c411a67c6200a762
treef5f9a511d0ed8ed5994a6b8d01e77aa0a188d79d
parent45515eec6662dee31a66bd06110ca0b8ded38574
crypto: qat - enable rate limiting feature for GEN6 devices

Add support for enabling rate limiting(RL) feature for QAT GEN6 by
initializing the rl_data member in adf_hw_device_data structure.

Implement init_num_svc_aes() for GEN6 which will populate the number of
AEs associated with the RL service type.

Implement adf_gen6_get_svc_slice_cnt() for GEN6 which will return
the slice count that can support the RL service type.

Co-developed-by: George Abraham P <george.abraham.p@intel.com>
Signed-off-by: George Abraham P <george.abraham.p@intel.com>
Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Documentation/ABI/testing/sysfs-driver-qat_rl
drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c
drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.h