drm/msm/dpu: Adjust writeback phys encoder setup for CWB
authorJessica Zhang <quic_jesszhan@quicinc.com>
Sat, 15 Feb 2025 00:14:33 +0000 (16:14 -0800)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 5 Mar 2025 02:34:12 +0000 (04:34 +0200)
commit3371005e28e8e731e62b7a51e0f0c3f5ee584c2c
treeaf25c50f419c9c08d0c93406fb470067841672cb
parent0f3801d666fe49069abc7883af4061c761e1bb68
drm/msm/dpu: Adjust writeback phys encoder setup for CWB

Adjust QoS remapper, OT limit, and CDP parameters to account for
concurrent writeback

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/637490/
Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-10-a44c293cf422@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c